X. Wang
Post Box 1209, No.13 Fa Yuan Street, Harbin Institute of Technology, 150001, China
Zhenzhou Ji
Post Box 1209, No.13 Fa Yuan Street, Harbin Institute of Technology, 150001, China
Chen Fu
Post Box 1209, No.13 Fa Yuan Street, Harbin Institute of Technology, 150001, China
Mingzeng Hu
Post Box 1209, No.13 Fa Yuan Street, Harbin Institute of Technology, 150001, China
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How to cite this article
X. Wang, Zhenzhou Ji, Chen Fu and Mingzeng Hu, 2009. A Review of Hardware Transactional Memory in Multicore Processors. Information Technology Journal, 8: 965-970.
DOI: 10.3923/itj.2009.965.970
URL: https://scialert.net/abstract/?doi=itj.2009.965.970
DOI: 10.3923/itj.2009.965.970
URL: https://scialert.net/abstract/?doi=itj.2009.965.970